A really excellent way to switch between actually seeing the individual instructions being decoded and executed and getting something fast enough to be (barely) usable!
We also upgraded the hardware while I worked there. We doubled the memory from 4K words (6K bytes) to 8K words. The upgrade cost five thousand dollars.
In 1962, Arma created the first microcomputer, or at least the first computer with that name. The Arma Micro Computer was a general-purpose aerospace computer built from transistors and transfluxors (two-hole core memory with a cool name). The computer was a tiny 0.4 cubic feet and 20 pounds. It was a 22-bit machine; while we now think word sizes must be a power of 2, back then people used whatever word size gave them the accuracy they needed.
The ARMA Micro D is really obscure. It shows up in some lists of early computers. Apparently it was inside some versions of the LTN-51 inertial navigation system. But this seems to have been around 1969-1970. The Concorde used that navigation system.
Would definitely be very cool to see though.
To be fair, so are all the "real" architectures. 8-bit chips especially are nothing but trade-offs to keep transistor count down.
See http://www.visual6502.org for a great visual sim of a chip operating.
>The maximum reliable clock rate is not yet determined, but we expect it to be in the tens to (low) hundreds of kHz.
Never mind the gates. Relaxen und watschen der blinkenlichten.
Indeed the LEDs are the most important part since this project seems to be all about exposition. For example:
> So how big is it ? Well an 8-bit adder is about a foot long (I use five of these)
If he were optimising for size rather than clarity, it would be much smaller. Instead he has nice diagramtic outlines for the gates, and generous spaces between them. And those LEDs! Those brighty lighty LEDs.
 ARGH! They closed the exhibit -- http://www.sciencemuseum.org.uk/visitmuseum/plan_your_visit/...
"The complete working Babbage engine is on public display at the Science Museum in London. A duplicate engine and printer, a 'second original', the Babbage Difference Engine No.2 was completed for a private benefactor of the project, Nathan Myhrvold, formerly chief technology officer and Group VP at Microsoft. The Babbage Difference Engine No 2. was on displayed and demonstrated from May 2008 to January 2016."
Except if you read my link, the London Science Museum has taken theirs (which is not Nathan's) off display. That was what I was saying "Argh!" about.
The paranoid in me wonders if in the future we'll have to resort to projects like this for sensitive tasks to know our hardware hasn't been backdoored...
This has got me picturing my store-bought laptop with monstrously large, homemade processors bursting from the case that I can use for sensitive tasks. I wonder how close this is to the realm of possibility.
I'm sure a Radeon and i5 would only be a bit larger. The internet may be obsolete by the time you're done wiring. ;)
Photo here http://arstechnica.com/gadgets/2007/08/a-history-of-the-amig...
Instead people would use wire a much more reliable technique for building prototypes and very low volume productions.
Wire wrapping involves boards with pre-drilled holes in which you insert IC sockets with elongated pins. You then wrap a few turns of wire around the pin and route your wire to another one.
That's what we see in the picture and others of the same prototype.
I think it's hard to be amazed enough at projects like the Amiga. Custom chips prototyped with discrete logic and a complete multitasking OS - all built from scratch.
Except, you would only have to use it to verify the security of the on-board processor in my dream . . .
It's pretty neat seeing him change the clock speed: https://youtu.be/z71h9XZbAWY?t=3m38s
Those words could have bee justly spake on getting this thing working. Incredible.
He included a live demo. It made a very satisfying "kachunk-kachunk-kachunk" sound as it multiplied two numbers. It also made me realize that the threshold of complexity necessary to construct a practical turing-complee computing device is quite low.
(Unfortunately the small demo isn't doesn't run to completion, perhaps because the source material didn't include it, or because uploading it all would have been nontrivial)
[Edit Addition: This isn't just a math joke, his mega-processor is exactly the size a processor was before micro-technology made them a million times smaller... so making something at 1/million scale scaled up million/1 makes it the same size as the original.]
It was actually shown at the Bay Area Maker's Fair:
I for example have really consolidated servers in recent years. VMs are fantastic. But the result is that I have lots of Data Center space spare.
I would love to buy servers of similar power consumption but larger foot print, for less dollars than small ones. Assuming that a lot of limitations and cost go into shrinking current systems.
Or are there other issues like distance between components that then come into play?
If your situation allows it, you could rent out the spare space you have, either by providing standard colocation or by racking old but usable stuff you have spare and making it available (either the real hardware or VMs). Depending on your location and what your pricing could be, this could be a nice side project. One or two cabinets could net a couple hundred (maybe thousand) per month easily, I think.
Another thing: maybe look into engineering-sample (ES) chips (like Xeons) on eBay. For some reason the market is flooded with them, so snap them up while they're around, if you can. You could build some nice kit with them :P
[PS. If the idea of that side project sounds interesting - I wouldn't mind low-scale sysadmin experience, if it would be helpful. My email's in my profile.]
When I saw it, you could send a message from one designated terminal to another, but that's just rolling balls on tracks. In the intended design you could choose which terminal it went to using an 8-bit IP address.
Many early CPUs took multiple clock cycles per instruction, anywhere between 2 and 10+.
So all instructions are executed in a single clock cycle?
It's pretty representative of 8 bit CPU true performance.
I hope this finds a permanent public home at some point. This would be great addition to any technical museum or exhibition.
They are the FPGA version of ST's Nucleo boards (which have built in "ST-LINK" for programming and debugging plus extra UART).
Seriously, that's quite an amazing project.
Fantastic for understanding!
One of my favorite channels as she's done many projects I've had interest in.