Hacker News new | past | comments | ask | show | jobs | submit login
Scaling up Superoptimization [pdf] (berkeley.edu)
60 points by jsnell on Mar 20, 2016 | hide | past | web | favorite | 9 comments



Has anyone in the superoptimization space given thought on how it could be used to provide useful feedback to CPU architects? I'm thinking of something like identifying an instruction sequence performing some state transformation that might appear esoteric to a human but turns out to be a common pattern in superoptimized programs.


Fred Chow built a compiler which did whole-program compilation, and basically picked out the instruction set for a soft processor based on what would make the program more efficient. I believe this was at Cognigine.

I've seen some other examples where a CPU has a bit of FPGA on it, available for building weird instructions. The problem there is often that the ideal weird instructions read too many registers.

Today's very OOO processors are a more difficult target for superoptimization than past in-order cpus.


No Instruction Set Computing and Tensilica's Xtensa are interesting work along those lines. Basically customize the CPU go the fast path. I'd love to see it combined with whole program optimization.


Thanks, yes, I was thinking of Tensilica. They use Fred's compiler (SGI -> Open64 compiler). Which has always done whole-program optimization.


Appreciate the reference. Is that OSS? I cant recall...


It is GPL v2. One of the most active developed-as-open-source branches is Path64.


TTA-based Co-Design Environment http://tce.cs.tut.fi/


Hell yeah! Thanks for the link!


I have a feeling that there might be some research along those lines here: http://homepages.inf.ed.ac.uk/cdubach/




Guidelines | FAQ | Support | API | Security | Lists | Bookmarklet | Legal | Apply to YC | Contact

Search: